1. Field of the Invention
The present invention relates generally to radio communication transmitting and receiving devices. More particularly, it relates to a Received Signal Strength Indicator (RSSI) comparison circuit for performing relatively error-free operation of time division duplexing according to variations of received signals in a Time Division Duplex (TDD) system.
A RSSI comparison circuit according to the present invention is based upon the Korean Application No. 64225/1995, which is incorporated herein by reference.
2. Description of the Related Art
In general, with rapid development in the radio communications field in converting from analog systems to digital systems, time division duplex systems are replacing frequency division duplex systems for duplex communications.
In the prior art, the checking of the RSSI is a standard technique for determining the characteristics of a received signal. In using the RSSI, it is preferable to use a circuit in conformity with physical and hierarchical features of time division duplex systems.
FIG. 1 illustrates an example of a radio receiver using a time division duplex system of the prior art. Referring to FIG. 1, signals received at an antenna 2 pass a high frequency switch 4 according to control signals output from a control-logic circuit 6. The received signals are then amplified by a predetermined amplification gain value by a low-noise amplifier 8, so that undesired signals of the amplified signals can be removed by a receiving bandpass filter 10, stabilized by a buffer circuit 12, and then input to a first mixer 14. A first local signal generated by a frequency synthesizer 16 is also input to the first mixer 14, which mixes the bandpassed signal and the first local signal and outputs the mixed signals to a first intermediate frequency bandpass filter 18. A differential signal is generated and output to a second mixer 20 after filtering by the first intermediate frequency bandpass filter 18. As described above, the second mixer 20 mixes a second local signal generated by a second local signal generator 22 with the filtered signal generated by the first intermediate bandpass filter 18, and the second local signal is output to a second intermediate frequency bandpass filter 24.
The differential signal passed by the second intermediate frequency bandpass filter 24 is amplified by a predetermined gain by a limiter 25, and the amplified signal output by the limiter 25 is converted into a voice signal 32 by a frequency discriminator 28, to be output as an electrical current or voltage. Also, an RSSI indicator 26 indicates the magnitude of the signal passed by the limiter 24, which is output to the RSSI comparison circuit 30 to generate an RSSI comparison signal. The RSSI comparison signal is output as an electric signal in proportion to the indicated magnitude of the signal from the limiter 24.
FIG. 4 is a graph illustrating a characteristic waveform of received signals according to the prior art. Referring to FIG. 4, a voltage of the electric signal output by the RSSI indicator 26 is compared with a predetermined reference voltage used by the RSSI comparison circuit 30 and the results of the comparison are transmitted as a comparison value or comparison signal 34 to a controller.
FIG. 2 illustrates the RSSI comparison circuit 30 of the prior art. Referring to FIG. 2, the RSSI comparison circuit 30 includes: a comparator 42 which receives at a first terminal a received signal from an input terminal 36; a first resistor 38 with a resistance denoted as R38; a second resistor 40 with a resistance denoted as R40 and having one terminal connected to ground, in which the resistors 38, 40 are connected to a second terminal of the comparator 42; and a voltage terminal is connected to a source of a power supply voltage VCC, with the voltage terminal coupled to the output terminal through a resistor 44 connected between the output terminal of the comparator 42 and the voltage terminal connected to the source of the power supply voltage VCC.
As described above, when a corresponding voltage of the received signal 36 is higher than the predetermined reference voltage, the RSSI comparison circuit 30 immediately outputs the power supply voltage VCC as a first predetermined state. When the voltage of the received signal 36 is lower than the predetermined reference voltage, the RSSI comparison circuit 30 immediately outputs the ground voltage as a second predetermined state.
In such operations, the predetermined reference voltage may be set to [(R40)/(R38+R40)].times.VCC.
When the RSSI comparison circuit 30 of the prior art is applied to a receiver using time division duplexing, the received signal 36 is substantially changed during the communications in light of the operating characteristics of time division duplex systems. Further, when the voltage of the received signal 36 is compared with the predetermined reference voltage, the RSSI comparison circuits of the prior art typically output the ground voltage as the second state during the communications, which may erroneously identify a detected voltage level corresponding to ground as an interruption of transmission.